/*****************************************************************************************/
/* ECSE 426 - Microprocessor - Fall 2009
/* Lab Experiment 3 - Header for all the C files (main.c and uart.c)
/* CONSTANTS.H
/* @author: Danny Wu - 260238209 - B.Comp.Eng
/* @author: Han-Sheng Chin - 260209715 - B.Elec.Eng
/* @version: 09.10.23.1508 
/****************************************************************************************/

//mandatory packages
#include <stdlib.h>
#include <string.h>
#include <cross_studio_io.h>

//control for debug mode
#define DEBUG_MODE FALSE

//general constants
#define TRUE 1
#define FALSE 0

//spi address constants
#define SPI_READ      0x80
#define SPI_WRITE     0x00
#define CSn_PIN       0x01
#define USART1_SIMO   0x02
#define USART1_SOMI   0x04
#define USART1_UCLK   0x08

// Configuration Registers
#define IOCFG2       0x00        // GDO2 output pin configuration
#define IOCFG1       0x01        // GDO1 output pin configuration
#define IOCFG0       0x02        // GDO0 output pin configuration
#define FIFOTHR      0x03        // RX FIFO and TX FIFO thresholds
#define SYNC1        0x04        // Sync word, high byte
#define SYNC0        0x05        // Sync word, low byte
#define PKTLEN       0x06        // Packet length
#define PKTCTRL1     0x07        // Packet automation control
#define PKTCTRL0     0x08        // Packet automation control
#define ADDR         0x09        // Device address
#define CHANNR       0x0A        // Channel number
#define FSCTRL1      0x0B        // Frequency synthesizer control
#define FSCTRL0      0x0C        // Frequency synthesizer control
#define FREQ2        0x0D        // Frequency control word, high byte
#define FREQ1        0x0E        // Frequency control word, middle byte
#define FREQ0        0x0F        // Frequency control word, low byte
#define MDMCFG4      0x10        // Modem configuration
#define MDMCFG3      0x11        // Modem configuration
#define MDMCFG2      0x12        // Modem configuration
#define MDMCFG1      0x13        // Modem configuration
#define MDMCFG0      0x14        // Modem configuration
#define DEVIATN      0x15        // Modem deviation setting
#define MCSM2        0x16        // Main Radio Cntrl State Machine config
#define MCSM1        0x17        // Main Radio Cntrl State Machine config
#define MCSM0        0x18        // Main Radio Cntrl State Machine config
#define FOCCFG       0x19        // Frequency Offset Compensation config
#define BSCFG        0x1A        // Bit Synchronization configuration
#define AGCCTRL2     0x1B        // AGC control
#define AGCCTRL1     0x1C        // AGC control
#define AGCCTRL0     0x1D        // AGC control
#define WOREVT1      0x1E        // High byte Event 0 timeout
#define WOREVT0      0x1F        // Low byte Event 0 timeout
#define WORCTRL      0x20        // Wake On Radio control
#define FREND1       0x21        // Front end RX configuration
#define FREND0       0x22        // Front end TX configuration
#define FSCAL3       0x23        // Frequency synthesizer calibration
#define FSCAL2       0x24        // Frequency synthesizer calibration
#define FSCAL1       0x25        // Frequency synthesizer calibration
#define FSCAL0       0x26        // Frequency synthesizer calibration
#define RCCTRL1      0x27        // RC oscillator configuration
#define RCCTRL0      0x28        // RC oscillator configuration
#define FSTEST       0x29        // Frequency synthesizer cal control
#define PTEST        0x2A        // Production test
#define AGCTEST      0x2B        // AGC test
#define TEST2        0x2C        // Various test settings
#define TEST1        0x2D        // Various test settings
#define TEST0        0x2E        // Various test settings

// Strobe commands
#define SRES         0x30        // Reset chip.
#define SFSTXON      0x31        // Enable/calibrate freq synthesizer
#define SXOFF        0x32        // Turn off crystal oscillator.
#define SCAL         0x33        // Calibrate freq synthesizer & disable
#define SRX          0x34        // Enable RX.
#define STX          0x35        // Enable TX.
#define SIDLE        0x36        // Exit RX / TX
#define SAFC         0x37        // AFC adjustment of freq synthesizer
#define SWOR         0x38        // Start automatic RX polling sequence
#define SPWD         0x39        // Enter pwr down mode when CSn goes hi
#define SFRX         0x3A        // Flush the RX FIFO buffer.
#define SFTX         0x3B        // Flush the TX FIFO buffer.
#define SWORRST      0x3C        // Reset real time clock.
#define SNOP         0x3D        // No operation.
#define PATABLE      0x3E        // POWER.
#define FIFO         0x3F        // FIFO
#define FIFO_RX      0x80        // FIFO RX
#define FIFO_TX      0x00        // FIFO TX

// Status registers
#define PARTNUM      0x30        // Part number
#define VERSION      0x31        // Current version number
#define FREQEST      0x32        // Frequency offset estimate
#define LQI          0x33        // Demodulator estimate for link quality
#define RSSI         0x34        // Received signal strength indication
#define MARCSTATE    0x35        // Control state machine state
#define WORTIME1     0x36        // High byte of WOR timer
#define WORTIME0     0x37        // Low byte of WOR timer
#define PKTSTATUS    0x38        // Current GDOx status and packet status
#define VCO_VC_DAC   0x39        // Current setting from PLL cal module
#define TXBYTES      0x3A        // Underflow and # of bytes in TXFIFO
#define RXBYTES      0x3B        // Overflow and # of bytes in RXFIFO
#define NUM_RXBYTES  0x7F        // Mask "# of bytes" field in _RXBYTES


//configuration to read from beacon
#define SETTING_IOCFG0 0x06
#define SETTING_MCSM1 0x3C
#define SETTING_MCSM0 0x18
#define SETTING_PKTLEN 0x13
#define SETTING_PKTCTRL0 0x05
#define SMARTRF_SETTING_FSCTRL1 0x07
#define SMARTRF_SETTING_FSCTRL0 0x00
#define SMARTRF_SETTING_FREQ2 0x5D
#define SMARTRF_SETTING_FREQ1 0x44
#define SMARTRF_SETTING_FREQ0 0xEC
#define SMARTRF_SETTING_MDMCFG4 0x2D
#define SMARTRF_SETTING_MDMCFG3 0x3B
#define SMARTRF_SETTING_MDMCFG2 0x73
#define SMARTRF_SETTING_MDMCFG1 0x23
#define SMARTRF_SETTING_MDMCFG0 0x3B
#define SMARTRF_SETTING_CHANNR 0x23
#define SMARTRF_SETTING_DEVIATN 0x01
#define SMARTRF_SETTING_FREND1 0xB6
#define SMARTRF_SETTING_FREND0 0x10
#define SMARTRF_SETTING_MCSM0 0x18
#define SMARTRF_SETTING_FOCCFG 0x1D
#define SMARTRF_SETTING_BSCFG 0x1C
#define SMARTRF_SETTING_AGCCTRL2 0xC7
#define SMARTRF_SETTING_AGCCTRL1 0x00
#define SMARTRF_SETTING_AGCCTRL0 0xB0
#define SMARTRF_SETTING_FSCAL3 0xEA
#define SMARTRF_SETTING_FSCAL2 0x0A
#define SMARTRF_SETTING_FSCAL1 0x00
#define SMARTRF_SETTING_FSCAL0 0x11
#define SMARTRF_SETTING_FSTEST 0x59
#define SMARTRF_SETTING_TEST2 0x88
#define SMARTRF_SETTING_TEST1 0x31
#define SMARTRF_SETTING_TEST0 0x0B
#define SMARTRF_SETTING_FIFOTHR 0x07
#define SMARTRF_SETTING_IOCFG2 0x29
#define SMARTRF_SETTING_IOCFG0D 0x06
#define SMARTRF_SETTING_PKTCTRL1 0x04
#define SMARTRF_SETTING_PKTCTRL0 0x05
#define SMARTRF_SETTING_ADDR 0x00
#define SMARTRF_SETTING_PKTLEN 0xFF

// Task Constants
#define vHOST_PKT_SIZE       24   // LEN(1);DST(1, broadcast address);SRC(1);'H';'Player name'(up to 20 bytes, null terminated string)
#define vCLIENT_PKT_SIZE     24   // LEN(1);DST(1);SRC(1);'R';'Player name'(up to 20 bytes, null terminated string)
#define HEARTBEAT_PKT_SIZE   5    // LEN(1);DST(1);SRC(1);'Z';'<NUM>'(1 byte indicating how many heartbeat I sent since I last got an heartbeat)
#define GUESS_PKT_SIZE       10   // LEN(1);DST(1);SRC(1);'G';'<Guess Count>'(2 bytes);'<Guess value>'(4 character ASCII guess e.g.: '1234', 0-9)
#define REPLY_PKT_SIZE       6    // LEN(1);DST(1);SRC(1);'Y';'<B>'(1 byte, number of bulls, ASCII encoded);'<C>'(1 byte, number of cows, ASCII encoded)
#define vSERVER_PKT_SIZE     35   // LEN(1);DST(1, broadcast address); SRC(1);'S';'T'(game termination);'String message' ( Up to 30 characters, NULL terminated )
